We PS3 users experience our own set of problems. There is no single piece of technology, to date, that is free from defect. We may not have the so-called “red ring of death” but we make up for that in thermal issues. Our network is hardly stable, and that is putting it mildly. But, be that as it may, the PS3 is still the most innovative system to date. The following is all the technical data you may not care to read. However, Rambus DRAM or RDRAM, was the first type of RAM I had ever integrated into my personal home system in 1999. It was thought to be a dead technology only a year after it was introduced. It is now one of the primary components driving the PS3; the fastest console on the market.
Wonder what makes the PS3 So special and different? Sony always applies cutting edge technology to its products and in PS3 it has used XDR based Technology shockingly its from US rather than Japan. Here is some briefing about the technology…
At the heart of Sony Computer Entertainment’s breakthrough PLAYSTATION®3 system is the Cell Broadband Engine™ (Cell BE™) processor. The Cell BE is a multi-core processor employing a PowerPC processor element (PPE) and seven synergistic processor elements (SPE) to provide supercomputer capability in a home computer entertainment system. The Cell BE is capable of 218 GFlops performance.
Sony, Toshiba and IBM co-developed the Cell BE for a wide range of computing and consumer electronics applications with the PLAYSTATION 3 being the flagship product.
Rambus XDR™ and FlexIO™ interfaces provide all the chip-to-chip connections between the Cell BE and its supporting logic, graphics processing and main memory devices. The PLAYSTATION 3’s breathtaking graphics performance, including high-end 1080p video output, is delivered by the RSX Reality Synthesizer. Meanwhile, the South Bridge chip is responsible for interface and control of PLAYSTATION 3’s rich provisioning of storage and communications technologies including Blu-ray™ Disc player, 160GB Hard drive, 802.11b/g WiFiTM, Gigabit Ethernet, USB 2.0 and Bluetooth® 2.0.
XDR™Memory Architecture and FlexIO™ Processor Bus Unleash the Power of the Cell Broadband Engine™
The Cell BE employs an architectural strategy of extremely high-bandwidth access to main memory in lieu of large on-chip memory cache. The XDR memory controller interface (XIO) on the Cell BE is 72 bits-wide and is capable of operating at 3.2Ghz data rates providing 25.6 GB/s of total memory bandwidth. Four 512Mb XDR DRAM devices provide for 256MB of high-performance main memory for the Cell BE.
The Cell BE employs a similar strategy of extremely high-bandwidth connections to companion chips to achieve unprecedented levels of performance. Rambus’ FlexIO processor bus provides the high-bandwidth connectivity between the Cell BE and the RSX and South Bridge chips. In the PLAYSTATION 3, the FlexIO interfaces connecting the Cell BE to its companion chips provide an aggregate bandwidth of 40 GB/s.
XDR™ Memory Architecture
The Rambus XDR™ memory architecture is a total memory system solution that achieves an order of magnitude higher performance than today’s standard memories while utilizing the fewest ICs. Perfect for compute and consumer electronics applications, a single, 2-byte wide, 4.0 GHz XDR DRAM component provides 8.0 GB/s of peak memory bandwidth.
Key components enabling the breakthrough performance of the XDR memory architecture are:
- XDR DRAM is a high-speed memory IC that turbo-charges standard CMOS DRAM cores with a high-speed interface capable of 4.0 GHz data rates providing up to 8 GB/s of bandwidth with a single device.
- XIO controller IO cell provides the same high-speed signaling capability found on the DRAM, but adds additional enhancements like FlexPhase™ technology that eliminates the need for trace length matching.
- XMC memory controller is a fully synthesizable logical memory controller that is optimized to take advantage of innovations like Dynamic Point-to-Point which provides for capacity expansion while delivering the signal integrity benefits of point-to-point signaling.
- XCG clock generator provides the system clocks with four programmable outputs and is guaranteed to meet the clocking requirements for the XIO and XDR DRAM devices.
XDR™2 Memory Architecture
The XDR™2 memory architecture
It is the world’s fastest memory system solution capable of providing twice the peak bandwidth per device when compared to a GDDR5-based system. Further, the XDR2 memory architecture delivers this performance at 30% lower power than GDDR5 at equivalent bandwidth.
Designed for scalability, power efficiency and manufacturability, the XDR2 architecture is a complete memory solution ideally suited for high-performance gaming, graphics and multi-core compute applications.
Initial systems can achieve memory bandwidths of over 500GB/s into an SoC. Each XDR DRAM can deliver up to 38.4GB/s of peak bandwidth from a single, 4-byte-wide, 9.6Gbps XDR2 DRAM device, and the XDR2 architecture supports a roadmap to device bandwidths of over 50GB/s.
Capable of data rates of 6.4 to 12.8Gbps, the XDR2 architecture is the latest generation in the award-winning family of XDR products. With backwards compatibility to XDR DRAM, the XDR2 architecture is part of a continuously compatible roadmap, offering a path for both performance upgrades and system cost reductions.
The XDR2 memory architecture is the first to incorporate innovations from Rambus’ Terabyte Bandwidth Initiative along with other key Rambus innovations including:
- 16X Data Rate enables high data rates (up to 12.8Gbps) at lower system clock and on-chip bus interface speeds.
- Fully Differential Memory Architecture (FDMA) improves signal integrity, reduces power and enables the highest memory performance available.
- Enhanced FlexPhase™ enables high data rates, simplifies layout and eliminates trace length matching.
- FlexLink™ C/A reduces system costs and controller pin-count while providing scalable capacity and flexible access granularity.
- Micro-threading increases transfer efficiency on micro-threaded workloads while reducing power consumption.
Special thanks to A.D.